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Using low-power dual-port for inter processor communication in next generation mobile handsets | サイプレス セミコンダクタ

Using low-power dual-port for inter processor communication in next generation mobile handsets

最終更新日: 
2008 年 11 月 13 日

The convergence of mobile phones and other consumer-driven devices such as PDAs, MP3 players, digital still and video cameras is progressing rapidly as evidenced by recent introductions of phones like the Motorola ROKR and Palm Treo.  Consequently, a classic engineering paradox has arisen: an ultra high-performance portable hand-held device with extreme low-power consumption.  Moreover, as the amount of processing power increases exponentially, it has become inevitable for mobile handset manufacturers and design houses to start adopting dual processor architectures.  With the high data rates inherent in 3G/3.5G wireless systems, the bandwidth and latency of processor interconnects have skyrocketed in order to accommodate the requirements of multimedia features. To view more on this topic, click the pdf download link or go to Mobile Handset DesignLine.

翻訳版のドキュメントは参照用です。設計開発に携わっている場合には、英語版のドキュメントを参照されることをお勧めします。