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CYS25G0101DX-EVAL | サイプレス セミコンダクタ


2012 年 2 月 08 日

Cypress's CYS25G0101DX SONET OC-48 Transceiver is a communications building block for high-speed SONET data communications. It provides complete parallel-to-serial and serial-to-parallel conversions, clock generation, and clock and data recovery operations in a single chip, optimized for full SONET/SDH compliance.

The CYS25G0101DX Evaluation Board is designed for evaluating as well as understanding the characteristics of the CYS25G0101DX SONET/SDH Transceiver. The evaluation board provides the following advantages:

  • Flexible and easy to operate
  • On-board Cypress 120-pin thin quad flat pack (TQFP) CYS25G0101DX SONET/SDH Transceiver
  • Supports LVPECL or HSTL interfaces
  • Dip switch for selecting different diagnostic modes
  • Four diagnostic modes - Diagnostic Loopback mode, Line Loopback mode, Analog Line Loopback mode, and factory TEST0 (Parallel Line Loopback) mode
  • Onboard oscillator for the REFCLK
  • Supports external clock source for the REFCLK
  • 16-bit RxD, 16-bit TxD bus, RXCLK, TXCLKI, TXCLKO interface
  • SMA connectors for CML input and output buffers
  • Separate Banana Jacks for all voltage sources for measuring current individually

For more information, please refer to the user's guide: CYS25G0101DX Evaluation Board User's Guide