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RoboClock® CY7B9950: 2.5 / 3.3 V, 200 MHz High Speed Multi-Phase PLL Clock Buffer | サイプレス セミコンダクタ

RoboClock® CY7B9950: 2.5 / 3.3 V, 200 MHz High Speed Multi-Phase PLL Clock Buffer

最終更新日: 
2018 年 1 月 29 日
バージョン: 
*L

2.5 / 3.3 V, 200 MHz High Speed Multi-Phase PLL Clock Buffer

特徴

  • 2.5 V or 3.3 V operation
  • Split output bank power supplies
  • Output frequency range: 6 MHz to 200 MHz
  • 50 ps typical matched-pair output-output skew
  • 50 ps typical cycle-cycle jitter
  • 49.5 / 50.5% typical output duty cycle
  • Selectable output drive strength
  • Selectable positive or negative edge synchronization
  • Eight LVTTL outputs driving 50Ω terminated lines
  • 詳しくは、PDF をご覧ください。

説明

The CY7B9950 RoboClock® is a low voltage, low power, eight-output, 200 MHz clock driver. It features output phase programmability which is necessary to optimize the clock tree design of high performance computer and communication systems.