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CYD09S72V, CYD18S72V: FLEx72™ 3.3 V 128 K/256 K × 72 Synchronous Dual-Port RAM | サイプレス セミコンダクタ

CYD09S72V, CYD18S72V: FLEx72™ 3.3 V 128 K/256 K × 72 Synchronous Dual-Port RAM

最終更新日: 
2015 年 8 月 31 日
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FLEx72™ 3.3 V 128 K/256 K × 72 Synchronous Dual-Port RAM

特徴

  • True dual-ported memory cells that allow simultaneous access of the same memory location
  • Synchronous pipelined operation
  • Family of 9-Mbit, and 18-Mbit devices
  • Pipelined output mode allows fast operation
  • 0.18-micron complmentary metal oxide semiconductor (CMOS) for optimum speed and power
  • High-speed clock to data access
  • 3.3 V low power
    • Active as low as 225 mA (typ)
    • Standby as low as 55 mA (typ)
  • 詳しくは、PDF をご覧ください。

機能説明

The FLEx72 family includes 9-Mbit and 18-Mbit pipelined, synchronous, true dual-port static RAMs that are high-speed, low-power 3.3 V CMOS. Two ports are provided, permitting independent, simultaneous access to any location in memory. The result of writing to the same location by more than one port at the same time is undefined. Registers on control, address, and data lines allow for minimal set-up and hold time.