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CY7C4021KV13, CY7C4041KV13: 72-Mbit QDR™-IV HP SRAM | サイプレス セミコンダクタ

CY7C4021KV13, CY7C4041KV13: 72-Mbit QDR™-IV HP SRAM

最終更新日: 
2017 年 8 月 15 日
バージョン: 
*O

72-Mbit QDR™-IV HP SRAM

特徴

  • 72-Mbit density (4 M × 18, 2 M × 36)
  • Total Random Transaction Rate of 1334 MT/s
  • Maximum operating frequency of 667 MHz
  • Read latency of 5.0 clock cycles and Write latency of 3.0 clock cycles
  • Two-word burst on all accesses
  • Dual independent bi-directional data ports
  • Single address port used to control both data ports
  • Single data rate (SDR) control signaling
  • 詳しくは、PDF をご覧ください。

 

機能説明

 

The QDR-IV HP (High-Performance) SRAM is a high performance memory device that has been optimized to maximize the number of random transactions per second by the use of two independent bi-directional data ports.

Dear valued customer,

Thank you for choosing our products. They come with all the know-how and passion that our engineers have put into it. As you probably already know, Cypress is now Infineon. This is a major step for our company, but also for the good of you. 

Reliability and business continuity are of utmost importance for us. Hence, we remain fully committed to honoring existing customer and distributor relationships. This includes offering the legacy Cypress product portfolio. We thank you very much for your trusting support.

For the full version of this message, please download the PDF version.

翻訳版のドキュメントは参照用です。設計開発に携わっている場合には、英語版のドキュメントを参照されることをお勧めします。