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CY7C1010DV33: 2-Mbit (256 K × 8) Static RAM | サイプレス セミコンダクタ

CY7C1010DV33: 2-Mbit (256 K × 8) Static RAM

最終更新日: 
2015 年 8 月 25 日
バージョン: 
*F

2-Mbit (256K x 8) Static RAM

特徴

  • Pin and function compatible with CY7C1010CV33
  • High speed
    • tAA = 10 ns
  • Low active power
    • ICC = 90 mA at 10 ns
  • Low CMOS standby power
    • ISB2 = 10 mA
  • 2.0V data retention
  • Automatic power down when deselected
  • TTL-compatible inputs and outputs
  • Easy memory expansion with CE and OE features
  • Available in Pb-Free 36-pin SOJ and 44-pin TSOP II package

機能説明

The CY7C1010DV33 is a high performance CMOS Static RAM organized as 256 K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A17).

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