You are here

CY7B9945V RoboClock®: High-Speed Multi-Phase PLL Clock Buffer Datasheet | サイプレス セミコンダクタ

CY7B9945V RoboClock®: High-Speed Multi-Phase PLL Clock Buffer Datasheet

最終更新日: 
2019年4月30日
バージョン: 
*P

High Speed Multi-phase PLL Clock Buffer

特徴

  • 500 ps max Total Timing Budget (TTB™) window
  • 24 MHz –200 MHz input and Output Operation
  • Low Output-output skew <200 ps
  • 10 + 1 LVTTL Outputs driving 50Ω terminated lines
  • Dedicated feedback output
  • Phase adjustments in 625ps/1300 ps steps up to + 10.4 ns
  • 3.3V LVTTL/LVPECL, Fault Tolerant, and Hot Insertable Reference Inputs
  • Multiply or Divide Ratios of 1 through 6, 8, 10, and 12
  • Individual Output Bank Disable
  • 詳しくは、PDF をご覧ください。



機能説明

The CY7B9945V high speed multi-phase PLL clock buffer offers user selectable control over system clock functions. This multiple output clock driver provides the system integrator with functions necessary to optimize the timing of high performance computer and communication systems.