CY29947: 2.5 V or 3.3 V, 200 MHz, 1:9 Clock Distribution Buffer | サイプレス セミコンダクタ
CY29947: 2.5 V or 3.3 V, 200 MHz, 1:9 Clock Distribution Buffer
2.5 V or 3.3 V, 200 MHz, 1:9 Clock Distribution Buffer
- 200-MHz clock support
- LVCMOS-/LVTTL-compatible inputs
- 9-clock outputs: drive up to 18-clock lines
- Synchronous Output Enable
- Output three-state control
- 250 ps max. output-to-output skew
- Pin compatible with MPC947, MPC9447
- Available in Industrial and Commercial temp. range
- 32-pin TQFP package
The CY29947 is a low-voltage 200 MHz clock distribution buffer with the capability to select one of two LVCMOS/LVTTL compatible clock inputs. The two clock sources can be used to provide for a test clock as well as the primary system clock. All other control inputs are LVCMOS/LVTTL compatible. The 9 outputs are LVCMOS or LVTTL compatible and can drive 50 Ω series or parallel terminated transmission lines.For series terminated transmission lines, each output can drive one or two traces giving the device an effective fanout of 1:18. The outputs can also be three-stated via the three-state input TS#. Low output-to-output skews make the CY29947 an ideal clock distribution buffer for nested clock trees in the most demanding of synchronous systems.
The CY29947 also provides a synchronous output enable input for enabling or disabling the output clocks. Since this input is internally synchronized to the input clock, potential output glitching or runt pulse generation is eliminated.
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