You are here

CY29942, 1:18 Clock Distribution Buffer | サイプレス セミコンダクタ

CY29942, 1:18 Clock Distribution Buffer

2017 年 11 月 30 日

1:18 Clock Distribution Buffer


  • Operational range: Up to 200 MHz
  • LVCMOS/LVTTL clock input
  • LVCMOS-/LVTTL-compatible logic input
  • 18 clock outputs: Drive up to 36 clock lines
  • Output-to-output Skew: 110 ps (typical)
  • Output enable control
  • Supply voltage: 2.5 V or 3.3 V
  • 温度範囲:Commercial and Industrial
  • 32-pin LQFP package
  • Pin compatible with MPC942C


The CY29942 is a low voltage clock distribution buffer with an LVCMOS or LVTTL compatible clock input. The output enable control input is LVCMOS/LVTTL compatible. The eighteen outputs are 2.5 V or 3.3 V LVCMOS or LVTTL compatible, operate up to 200 MHz, and can drive 50 Ω series or parallel terminated transmission lines. For series terminated transmission lines, each output can drive one or two traces, giving the devices an effective fanout of 1:36.