Reset (PDL_RESET) | サイプレス セミコンダクタ
The Reset Component determines the cause of a device reset. It is often used to manage serious application problems gracefully.
注: the application must enable clock failure and anomalous frequency detection with the Clock Supervisor (CSV) component.
注: resets from standby mode are configured and detected in the Low Power Mode (LPM) Component, not Reset.