Reset (PDL_RESET) | サイプレス セミコンダクタ
Reset (PDL_RESET)
最終更新日:
2018 年 2 月 27 日
バージョン:
1.0
特徴
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シンボル図![]() |
一般的な説明 The Reset Component determines the cause of a device reset. It is often used to manage serious application problems gracefully. 注: the application must enable clock failure and anomalous frequency detection with the Clock Supervisor (CSV) component. 注: resets from standby mode are configured and detected in the Low Power Mode (LPM) Component, not Reset. |