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PSoC 4 Direct Memory Access (DMA) Channel | サイプレス セミコンダクタ

PSoC 4 Direct Memory Access (DMA) Channel

最終更新日: 
2015 年 12 月 22 日
バージョン: 
1.0

特徴

  • Support for up to 32 DMA channels; consult the device-specific datasheet to determine how many channels for a particular device
  • Two independent descriptors per channel
  • Four priority level
  • Byte, halfword (2 bytes), and word (4 bytes) transfers
  • Transfer sizes up to 65536 data elements
  • Configurable interrupt generation
  • Output trigger on completion of transfer
  • Three transfer mode

一般的な説明
The DMA Channel component transfers data to and from memory, components, and registers. These transfers occur independent of the CPU. The DMA can transfer up to 65,536 data elements. These data elements can be a byte, halfword (2 bytes), or word (4 bytes) wide. The DMA starts each transaction through an external trigger that can come from a DMA channel (including itself), another DMA channel, a peripheral, or the CPU. The DMA is best used to offload data transfer tasks from the CPU.