Low Voltage Detect (PDL_LVD) | Cypress Semiconductor
Low Voltage Detect (PDL_LVD)
最終更新日:
2018 年 2 月 27 日
バージョン：
1.0
特徴
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シンボル図 |
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一般的な説明 The Low Voltage Detection (LVD) Component monitors the system power supply voltage to avoid uncontrolled processor halt or brownout conditions. In addition to a dedicated reset voltage level setting, there are two channels with configurable detection voltages that can generate interrupts, warning the application of an impending low voltage condition. On S6E1B devices there is also a release threshold that can be used to release the device from reset or generate an interrupt, signaling that the low power situation has passed. |
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関連ファイル
| ファイル名 | 言語 | サイズ | 最終更新日 |
|---|---|---|---|
 Low Voltage Detect (PDL_LVD) 1.0.pdf |
英語 | 216.59 KB | 10/10/2016 |