EZI2C (SCB_EZI2C_PDL) | サイプレス セミコンダクタ
The SCB_EZI2C_PDL Component is a unique implementation of an I2C slave in that all communication between the master and slave is handled in the Interrupt Service Routine (ISR). It requires no interaction with the main program flow. The interface appears as shared memory between the master and slave.
The SCB_EZI2C_PDL Component is a graphical configuration entity built on top of the cy_scb driver available in the PDL. It allows schematic-based connections and hardware configuration as defined by the Component Configure dialog.