AN90833 - PSoC® 1 Interrupts | サイプレス セミコンダクタ
AN90833 - PSoC® 1 Interrupts
AN90833 introduces you to the PSoC® 1 interrupt architecture and interrupt sources. This document also includes sections on interrupt priority, interrupt latency, and several recommendations on writing efficient and defect-free interrupt routines.
Interrupts are an important part of any embedded application because they free the CPU from continuously polling the occurrence of a specific event. Instead, interrupts notify the CPU only when that event occurs. In a system-on-chip (SoC) architecture, such as PSoC® 1, interrupts are frequently used to communicate the status of on-chip peripherals to the CPU.
AN90833 introduces you to the PSoC 1 interrupt architecture and explains how interrupt service routines (ISRs) are implemented in PSoC Designer™, the integrated design environment (IDE) for PSoC 1. An example project is also provided with this application note.