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AN74875 - Designing with Serial I2C nvSRAM | サイプレス セミコンダクタ

AN74875 - Designing with Serial I2C nvSRAM

最終更新日: 
2018 年 1 月 29 日
バージョン: 
*E

A typical I2C single master-multi slave configuration is shown in the following diagram.

Serial I2C nvSRAM Diagram (AN74875)

This application note provides a few example circuits, design guidelines, and PSoC®3 based sample code snippets to help users understand and design with Cypress I2C nvSRAM.

An "I2C nvRAM" component library is also created using Cypress PSoC®3 device as a reference design project and attached to this Application Note. The PSoC®3 component library configures Cypress PSoC®3 device as a standard I2C master controller and also provides the list of APIs which can directly be called in an application firmware to access the I2C nvSRAM functions.

翻訳版のドキュメントは参照用です。設計開発に携わっている場合には、英語版のドキュメントを参照されることをお勧めします。