AN74875 - Designing with Serial I2C nvSRAM | サイプレス セミコンダクタ
AN74875 - Designing with Serial I2C nvSRAM
A typical I2C single master-multi slave configuration is shown in the following diagram.
This application note provides a few example circuits, design guidelines, and PSoC®3 based sample code snippets to help users understand and design with Cypress I2C nvSRAM.
An "I2C nvRAM" component library is also created using Cypress PSoC®3 device as a reference design project and attached to this Application Note. The PSoC®3 component library configures Cypress PSoC®3 device as a standard I2C master controller and also provides the list of APIs which can directly be called in an application firmware to access the I2C nvSRAM functions.