Traveo S6J312A/9/8 Classic Cluster ARM® Cortex®-R5 MCU | Cypress Semiconductor

Traveo S6J312A/9/8 Classic Cluster ARM® Cortex®-R5 MCU

  • Single-Chip Automotive Cluster and Body Solution

The Cypress Traveo S6J3120 Series features a single ARM®Cortex-R5 and operates at 112 MHz with 1MB flash.The S6J3120 incorporates the high-performance CAN FD interface for enhanced in-vehicle networking.

In addition to the CAN FD interface operating at 5 Mbps, the S6J3120 series comes with LCDC and SMC for segment/needle controls.

It also features Secure Hardware Extension (SHE) for network security and improved performance for connected cars, as well as advanced partial wakeup for lowering power consumption.

ブロック図

Product Name Maximum Internal Clock [MHz] Floating Point Unit Memory Protection Unit Package [pin] Operating Voltage:VCC [V] Sub Clock ROM [Byte] RAM [Byte] Cache [KByte] DMAC [ch] Ext. Interrupt [ch] External Bus I/F Max. I/O port [ch] 12-bit ADC [ch x unit] Output Compare [ch] Free-Run Timer [ch] Input Capture [ch] Reload Timer, PWM Timer, PWC Timer, PPG Timer / Base Timer (Reload/PPG/PWM/PWC Selectable) [ch] Up/Down Counter [ch] Other timers [ch] I2C, UART/SI, SIO, Multi Function Serial - MFS (MFS:LIN/UART/SIO/I2C Selectable) [ch] CAN [ch] MediaLB Ethernet AVB LCD Controller Driver
[seg x com]
Stepper Motor Controller Driver [ch] Graphic Display Controller Display Output [ch] FPD Link (LVDS) [ch] Sound Generator High-Quality Sound System Secure Hardware Extention (Optional) Remarks Evaluation Method / Device
S6J3128 128 - はい TEQFP-144 4.5 to 5.5 576K + 112K TC- RAM:32K, System- RAM:16K,
Backup- RAM:8K
Instruction:16
Data:16
16 16 A24/ D16 112 22 x 1 + 28 x 1 12 6 12 Reload Timer x 10, 16bit Base Timer x 30 2 * RTC x 1 MFS x 10 (No I2C and UART on Ch. 1/2/12) CANFD 192Msg-buffer x 3 32 x 4 4 3 はい ARM Cortex-R5
DDR HS SPI x1, * QRPC x 2 (= Up/Down Counter)
On-chip Debugger
S6J3129 128 - はい TEQFP-144 4.5 to 5.5 832K + 112K TC- RAM:48K, System- RAM:16K,
Backup- RAM:8K
Instruction:16
Data:16
16 16 A24/ D16 112 22 x 1 + 28 x 1 12 6 12 Reload Timer x 10, 16bit Base Timer x 30 2 * RTC x 1 MFS x 10 (No I2C and UART on Ch. 1/2/12) CANFD 192Msg-buffer x 3 32 x 4 4 3 はい ARM Cortex-R5
DDR HS SPI x1, * QRPC x 2 (= Up/Down Counter)
On-chip Debugger
S6J312A 128 - はい TEQFP-144 4.5 to 5.5 1088K + 112K TC- RAM:64K, System- RAM:16K,
Backup- RAM:8K
Instruction:16
Data:16
16 16 A24/ D16 112 22 x 1 + 28 x 1 12 6 12 Reload Timer x 10, 16bit Base Timer x 30 2 * RTC x 1 MFS x 10 (No I2C and UART on Ch. 1/2/12) CANFD 192Msg-buffer x 3 32 x 4 4 3 はい ARM Cortex-R5
DDR HS SPI x1, * QRPC x 2 (= Up/Down Counter)
On-chip Debugger
Fact Sheet (1)

Download File

Date:2014-11-04
Size:0.42 MB
Revision:1
 
Catalog (1)

Download File

Date:2015-04-14
Size:1.42 MB
Revision:2
 

Download File

Date:2015-03-30
Size:0.71 MB
Revision:1
 
Data Sheet (2)

Download File

Date:2014-10-24
Size:2.06 MB
Revision:0
 

Download File

Date:2013-09-30
Size:0.05 MB
Revision:3
 
Hardware Manual (1)

Download File

Date:2014-10-31
Size:37.58 MB
Revision:1
 
Application Note (8)