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PSoC 4 CapSense Tuner - There was an error reading data from the device | Cypress Semiconductor

PSoC 4 CapSense Tuner - There was an error reading data from the device

Summary:6 Replies, Latest post by prithvir.prakash_2279271 on 27 Apr 2017 10:59 PM PDT
Verified Answers:2
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I'm using the PSoC CY8CKIT-145-40XX Prototyping Kit. It has a PSoC 4 CY8C4045AZI-S413 IC.

I have been trying all week just to use the tuner application.I have used the example code that was already available through the PSoC creator.I have followed all the steps correctly, even double checked (more than double) that the configuration parameters are the same for both the Tuner and EZI2C. 

I have attached the MINIMAL workspace bundle.Any Advice would help.WHAT AM I DOING WRONG?

user_1377889's picture
10575 posts

Welcome in the forum.

Do not use debugging and tuner at the same time.Set the debug mode to "gpio" in system view to disable debugging.



Thanks for replying!

I did set the Debugging mode to GPIO, but that did not solve the issue.But how does this affect the tuning process?I'd like to know if you wouldn't mind.

Volodymyr Medvid was right.PSoC Creator threw an error when I changed the Pin lock (and by the way it did not allow me to drag the function over to the pins, I had to enter it in the drop down field).Both the SCL and SDA pins were invalid and are were not allowed to be routed to those pins; but as soon as I rebuilt the project, the error disappeared. 

Volodymyr Medvid's picture
Cypress Employee
4 posts

in the above project EZI2C scl/sda lines are connected to wrong pins - should be P1[0], P1[1], not P3[0], P3[1].Kindly refer to CY8CKIT-145-40XX_Kit_Guide.pdf, section 3.2.5 "USB-I2C Bridge", also see Firmware\PSoC 4000S\CE210709 CapSense Linear Slider and Buttons (also available with the kit installation) - a working project with the EZI2C CapSense Tuner enabled.

Thank you, Volodymyr !I had been working on UART for sometime, and i must have mistaken the UART pins for the I2C.It works fine now. 

But when i tried changing the pin lock information it set the pin as invalid and then after rebuilding the project it resolved the error on its own.I'd like to know why - I have attached a screenshot of the same. (ignore the SDA pin at P3[1], its shows the same error once i change it back to P1[1]).

Volodymyr Medvid's picture
Cypress Employee
4 posts

CY8C4045AZI-S413 has 2 SCB blocks - SCB[0] with i2c_scl/i2c_sda assignable to either P1[0]/P1[1] or P4[0]/P4[1], and SCB[1] - to P0[4]/P0[5], P2[0]/P2[1], or P3[0]/P3[1].The error from the guided pin selector correctly indicates that you cannot have single EZI2C instance assigned to P1[0]/P3[1] - that wouldn't work.
Whenever you assign both scl and sda to valid pair of pins like P1[0]/P1[1], the error should be gone.Sometimes it takes a little time for the pin selector to re-elaborate the current pin assignments.

Thanks, it did work :)

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