Fertility Monitor | Cypress Semiconductor
Fertility Monitors are devices that monitor fertility levels by monitoring hormone levels.A fertility monitor may analyze hormone levels in bodily fluids, resistance in bodily fluids, basal temperature, or a combination of these methods.There are three standard methods for monitoring hormone levels:
Urine:Tests for luteinizing hormone surge
Saliva:Detects changing electrolyte levels
Temperature:Monitors basal body temperature to predict cycles
Each of these sensing methods require an analog front end (AFE) to perform the necessary measurements.Fertility Monitors are battery powered devices so active power consumption and sleep current are important considerations.A fertility monitor also includes a display, memory for storage of fertility reading history, serial communication such as USB.A touchscreen or capsense user interface may also be seen in fertility monitors.
PSoC® 3 and PSoC 5 provide a scalable platform which provides all the requisite circuitry to provide a configurable Fertility Monitor on Chip, including:
• High precision Analog front end, including a 0.1% accurate Voltage reference and up to 20 bits of resolution
• Circuitry for sequencing and driving LED for optical measurement of the test strip and the circuitry for reading the photodiode to create a full optical measurement system
• LCD direct drive and control
• Low active and sleep mode power consumption, with full operation down to 0.5V
• CapSense fully integrated
• FS USB
• On chip EEPROM
AN52927 demonstrates how easy it is to drive a segment LCD glass using the integrated LCD driver in PSoC 3 and PSoC 5LP.This application note gives a brief introduction to segment LCD drive features and provides a step-by-step procedure to design Segment LCD applications using the PSoC Creator tool.
AN57821 introduces basic PCB layout practices to achieve 12- to 20-bit performance for the PSoC 3, PSoC 4, and PSoC 5LP family of devices.
AN58304 provides an overview of the analog routing matrix in PSoC® 3 and PSoC 5LP.This matrix is used to interconnect analog blocks and GPIO pins.A good understanding of the analog routing and pin connections can help the designer make selections to achieve the best possible analog performance.Topics such as LCD and CapSense routing are not covered in this application note.
AN58827 discusses how internal trace and switch resistance can affect the performance of a design and how these issues can be avoided by understanding a few basic details about the PSoC® 3 and PSoC 5LP internal analog architecture.
This application note describes how to configure the PSoC® 3 and PSoC 5LP IDACs as a flexible analog source.It presents different approaches for using the IDACs in applications, and discusses the advantages and disadvantages of the topologies presented.This application note will:help you to understand compliance voltage and why it is important; explain how to generate an “any range” or “any ground” VDAC; describe an implementation for a multiplying VDAC; give details on how to build a rail-to-rail low-output impedance 9-bit VDAC from a single IDAC, an opamp, and a resistor; and provide information on how to build a current scaling circuit with an opamp and two resistors.
AN60590 explains diode-based temperature measurement using PSoC® 3, PSoC 4, and PSoC 5LP.
開発キット / ボード
The CY8CKIT-001 PSoC® Development Kit (DVK) provides a common development platform where you can prototype and evaluate different solutions using any one of the PSoC 1, PSoC 3, PSoC 4, or PSoC 5 architectures.
Cypress's PSoC programmable system-on-chip architecture gives you the freedom; to not only imagine revolutionary new products, but the capability to also get those products to market faster than anyone else.Explore PSoC 3's precision analog capabilities through the on board 20-bit Delta Sigma ADC used to measure voltage ranges between -30 V and 30 V.
The CY8CKIT-029 PSoC® LCD Segment Drive Expansion Board Kit allows you to evaluate PSoC's LCD drive capability using LCD segment component in Cypress's PSoC Creator™.